Why are small wafer fabs and packaging facilities thriving?
In the semiconductor field, high-volume products have received more attention than they deserve, but most chips do not fall into this category. Although a few large factories and offshore assembly and test (OSAT) factories handle a large number of chips, small factories and packaging lines serve the fields of low-volume production, specialized technology, and prototype manufacturing.
"Some companies only produce a batch of 25 wafers per quarter," said Tim Brosnihan, Executive Director of the SEMI Wafer Fab Owners Alliance and the MEMS and Sensors Industry Group. "The market prospects for these wafers are still very good, and the profit margins for niche and customized parts are higher."
Today, the vast majority of chips use standard CMOS logic and traditional packaging. However, many industries require services that large foundries and OSATs may be unwilling to provide. Nevertheless, the demand for such services remains strong. These services are usually targeted at specialized high-profit products, some of which (but not all) require special treatment. This allows small manufacturers to survive.
Not all companies need mass production.
Microprocessors, graphics processing units (GPUs), smartphone application processors, and memory, these products are sold at a speed of hundreds of millions of units. They account for the vast majority of shipments, so they attract everyone's attention. However, they only account for a small part of engineering activities, developing a variety of other chips with moderate shipments.
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This is evident in military and aerospace (mil/aero) systems, which consume very few chips. "The defense industry uses a large number of special semiconductors, and the quantities are very small," Brosnihan said. What is unusual about military/aerospace is that it has driven many long-term, sometimes cutting-edge technology roadmaps through the Defense Advanced Research Projects Agency (DARPA), but the sector remains conservative in ensuring reliability and availability.The shipment volumes of many other technologies are also low. "There are optoelectronic and compound semiconductor manufacturers who do not have to push production as hard as some of our other larger companies," said JST CEO Ryan Zrno.
Wearable devices such as fitness trackers need to be reliable enough, but the shipment volumes of those devices that require FDA approval and truly claim to make accurate diagnoses or treat diseases are much smaller. The key is that the finished product has enough profit margin, and the packaging process is often an element that creates value.
Promex Industries COO Dave Fromm said, "In some industries, the value of the device itself is far higher than the BOM (Bill of Materials). If I manufacture an implantable medical device, the value of the components inside may only be 10 cents. But the value of the device itself is very high because it needs to work, it needs to be reliable, to ensure that it can do its job anytime, anywhere."
The sales volume of most sensors is not large, but there are some obvious exceptions. "The annual sales volume of mobile phone microphones is about 1 billion," Brosnihan said. "But there are many sensors with much smaller production volumes." Inertial Measurement Units (IMUs), which are combinations of accelerometers and gyroscopes, are also used in mobile phones. The rest are often used in more specialized equipment, such as industrial machinery.
For example, navigation-grade IMUs are much more expensive than consumer-grade IMUs, but their accuracy is sufficient for precise navigation, not just approximate navigation. "The production volume of navigation-grade [IMUs] is definitely much smaller, and they are all produced by smaller factories," Brosnihan said.
Other technologies with small batch sizes include photonics and power electronics. However, it is surprising that there is a market that usually does not account for a share of small-batch silicon wafers - universities and R&D laboratories. Although equipment manufacturers may sell some small-batch equipment to them, the amount is negligible (of course, these customers do not ship silicon wafers to make money).
Yield and Portfolio
High yield often means that the most advanced silicon wafer processing technology can be used. Although this affects the available equipment and processing types, there is a more fundamental control parameter - wafer size. Most of the equipment in the mainstream large-volume market is manufactured on 300mm wafers. The advantage is that a large number of chips can be produced from a single wafer, reducing the number of wafers and batches that need to be processed to achieve the same yield.
However, for some applications, this wafer may be a bit excessive. The area of a 300mm wafer is more than twice that of a 200mm wafer, and production can be more easily planned by flowing through a more stable small wafer rather than a burst large wafer plan. But most of the production learning comes from the large-volume production of 300mm wafers, so this learning is now benefiting 200mm. Many advanced technologies added to 300mm equipment have been ported to 200mm equipment.
"Yield" also has nuances when considered together with the product portfolio. "Texas Instruments has a very large product portfolio, which adds up to a very high yield, but the yield of any specific amplifier may be lower," Brosnihan said. As long as most chips share similar processing, they can be manufactured in an economical and efficient manner.Some companies, such as ADI, are willing to split production to their own specialized production lines and commercial foundries. When the equipment involves mainstream technology, the company will outsource it. "If you look at ADI, known for small batch and high mix, a large part of their business is now outsourced to foundries such as TSMC," Brosnihan said. "They keep the more specialized things in-house."
This provides ADI with greater flexibility in producing mainstream components, avoiding the need to build a wafer factory and keep it running at full capacity.
High-volume chip manufacturers may still selectively undertake some low-volume projects. "I believe TSMC may produce some products with a monthly output of 100 wafers," Brosnihan said. "I wouldn't say they are interested in any opportunity of 100 wafers that comes to their door, but they will choose those that may increase production to thousands of wafers per month in a few years."
Low-volume prototypes as examples
Packaging is experiencing more new configurations than silicon wafer processing. Dedicated equipment is increasingly packaging multiple chips, as well as mechanical and optical components together. These projects tend to be more personalized than silicon wafer designs. Some processes improved in these projects may play a role in larger batches in the future, while others may be specific to the project. "Most of our revenue comes from production," said Promex's Fromm. "But if you look at the number of activities going on, you will find that most involve the development of new processes."
As the name suggests, the prototype design stage precedes production, so the output does not reflect the final shipment of the product. For packaging, pilot production lines can develop and improve processes, and if the final shipment of the product exceeds the capacity of the small production line, these processes can be transferred to large batch OSAT.
Such production lines must be able to perform a variety of processes. "We define heterogeneous integration as combining electronic and non-electronic components in the package, which includes mechanical sawing and grinding of these devices to make them very thin," Fromm said. "We can cut and grind other materials besides silicon. Optical filters may be made of quartz, glass, or sapphire. We cut ceramic materials and similar things, and we can also cut all substrates into interlayer sizes. Then, in terms of connection, we have many methods to weld or bond connections, connect small parts, mechanical, electrical, thermal connections, or some combination of these methods. We have packaging methods to protect these things."
Silicon wafer R&D usually does not follow the "prototype here, production there" model. SEMI Marketing Communications Director Samer Bahou said: "(It is common for foundries) to have an R&D line to quickly provide cutting-edge technology to local customers for certification and ensure they can meet the needs of those top customers." Brosnihan agrees: "I recently conducted a survey of wafer factory owners to see how many are doing R&D on the production line. The result is that almost everyone is doing R&D."
However, foundries tend to limit these production lines to certain specific new steps that are being evaluated. This allows them to complete the rest of the processing on the standard production line. The reason is that any changes to the equipment require re-certification of the chip. Once the small batch production is qualified, you want to be able to use the exact same equipment to go directly into mass production.
Mixing R&D with production has raised the age-old problem of production managers being reluctant to give time to the engineering department. "Now there are better systems to determine how many batches to allocate to the engineering department and R&D department in the factory and what priority to give them," Brosnihan said. "Usually, the R&D team will get a hot batch. Everything else is queued according to standard queue time."Multi-Project Wafers (MPW) are commonly used for silicon wafer prototyping, allowing multiple companies to share a wafer. However, this is only suitable for chip and IP prototyping. They are not suitable for low-volume production, as scheduling and mixing issues will be difficult to manage. If one company's chip production grows faster than another, the latter will have a large inventory backlog due to the wafers required by the former.
Handling Low-Volume Wafer Production
Low volume is often divided into two categories: New Product Introduction (NPI) and products that will never be shipped in large quantities. For NPI, companies may manufacture a small number of samples for early design, testing, and reliability evaluation. For mainstream products, some companies may provide inventory to all distributors, so the initial production volume may be large. Other companies manufacture devices cautiously after receiving orders.
For the above re-certification reasons, NPI batches are almost always produced in the same wafer foundry as higher subsequent batches. However, there are two Canadian companies with a unique model. A small company called C2MI (MiQro Innovation Collaboration Center) is responsible for prototype design and low-volume production. If the production volume exceeds its management capacity, production will be transferred to Teledyne Dalsa, which intends to keep its equipment as close as possible to the equipment used by C2MI to alleviate the re-certification burden. These are not independent divisions of a large company. "They are independent organizations with a cooperative relationship," Brosnihan said.
The decline in production volume also affects equipment. Large wafer foundries need equipment that allows them to produce a large number of wafers as quickly as possible. For many steps, this means as many wafers as possible (i.e., the chambers on the machine). Smaller wafer foundries need the same equipment but in smaller quantities. "Some large companies only focus on large companies," Zrno said. "However, these smaller compound semiconductor manufacturers need precision single-wafer systems, and they will not buy 24-chamber tools." This provides a market that small equipment manufacturers may target that large companies may not aim for.
Unfortunately, geopolitics also affect the decision of manufacturing locations. Chips used in military and defense applications are usually manufactured locally by trusted contractors. But the price is that local wafer foundries and assembly plants are often more expensive.
Specialized Processing, Specialized Wafer Foundries
Mainstream foundries are not suitable for unusual technologies such as photonics and micro-electromechanical systems (MEMS). The former involves silicon and packaging. Lasers require compound semiconductors, which can then be mounted on or packaged with silicon chips. "These photonic circuits will introduce external optical fibers and V-grooves," Fromm added, to reliably fix the optical fibers and give them positioning and angle, thereby effectively transmitting light into and out of the optical fibers.
Silicon photonics can utilize any silicon process, but the critical dimensions are often measured in micrometers rather than nanometers. Therefore, the tightest and most expensive processes are unnecessary. Traditional processes are more cost-effective, and 200mm wafers can usually meet the small batch requirements of such chips well.
Some silicon processes (such as those used for MEMS) are notorious for requiring new processes or process modifications for each design. MEMS production is often dominated by companies very different from TSMC (although TSMC does do some small-batch MEMS work). "Infineon will be the largest supplier of MEMS microphone sensors," Brosnihan said. "Bosch produces more MEMS devices than TSMC." STMicroelectronics ships a wide variety of MEMS sensors, with a considerable total output. For other opportunities, designers can turn to specialized MEMS wafer foundries, such as Rogue Valley Microdevices.The combination of high-end silicon characteristics and low yield is a contradictory entity.
As long as the manufacturing process is not too advanced, small wafer factories can obtain the equipment needed for manufacturing. Although some equipment manufacturers have explicitly manufactured miniaturized, low-yield versions of equipment in mainstream wafer factories, with the advancement of processes, the cost of equipment will be higher, and there are certain limitations.
The typical representative of expensive equipment is the extreme ultraviolet (EUV) lithography machine from ASML, which costs up to 200 million US dollars per unit. Small wafer factories will never be able to afford such a high capital expenditure. This means that the most advanced silicon node will never be adopted by small wafer factories. This seems to indicate that great ideas that require advanced silicon but have a small shipment will never be realized, because any high-end product must be shipped in large quantities, otherwise it cannot be realized. But the fact is not so.
For products with a high enough profit margin, wafer core extraction has become a method that can bypass this limitation. It is not uncommon for a dedicated chip to be mainly composed of standard processing, and then a small number of dedicated layers are added on the standard layer. A typical reason for doing this is to "functionalize" the chip by adding different materials with special properties.
Since the underlying layer is standard, as long as there is enough output, they can be manufactured on any process that the foundry can handle. The problem is that they are usually located on 300mm wafers. Subsequent steps are usually carried out on machines that are only suitable for 200mm wafers. Therefore, the standard 300mm wafer is the "core".
"Some companies will buy 300mm high-density CMOS wafers, grind them into 200mm wafers, and then add materials for optics, sensors, optics, or biology to the wafer through some process," Brosnihan said. This process is costly and wasteful, but it does work. "They will throw away half of the silicon when grinding, so you'd better be able to make a lot of money."
But for the right opportunities, this method can provide the opportunity to obtain cutting-edge and specialized processing.
The packaging process is becoming more and more diverse.
Given the development of advanced packaging, the challenges faced by packaging factories are also increasing. Assembling multiple small chips in a package is no longer cutting-edge technology, and its cost is still high compared to standard packaging. But many projects involve further challenges. For such products, the process has not yet stabilized and become a standard process.
"Is there a recipe that you can adjust and then run a class of devices?" Frohm asked. "In terms of process and the quality of input materials, adhesives, and other interconnection materials, this can be achieved with maturity. Many of the devices we manufacture are so specific that each device requires a process that almost starts from scratch."New materials are continuously being developed, not only silicon but also packaging. One of the biggest challenges is to combine different materials in a way that is stable and reliable under temperature changes. Each material has a coefficient of thermal expansion (CTE), which describes the degree to which the material expands and contracts with temperature changes.
"When dealing with these devices, temperatures change during reflow soldering or curing of adhesives, so they are very sensitive to the mismatch of CTEs between different materials," said Fromm. "When there were only one or two materials in traditional devices, it was very easy to manage. When there are three, four, or five different materials, it becomes more difficult to manage, and the CTEs of these materials are also different. The CTE of silicon and organic adhesives can differ by 10 or 20 times. Path length will become a bigger issue. They are very sensitive to warping on longer lever arms. These are catastrophic problems. Parts will be damaged, or parts will fail prematurely after leaving the factory due to stress and mechanical strain, leading to reliability issues."
Other challenges faced by new packaging methods include coplanarity, as it is necessary to reliably connect a large number of solder balls on PCBs or other panels. Some packages require windows for light transmission, or they may have gas or liquid ports. "For many of these devices used in medical biotechnology, you need some kind of gas cavity or some kind of opening," said Rosie Medina, Vice President of Sales and Marketing at Promex.
Medical packaging is often very specialized, especially for sensors that enter the human body through implantation or ingestion. These materials must be biocompatible and sealed to protect electronic devices from harsh environments, and vice versa.
"If it is part of an endoscope, then there will be a business end that is welded to something else," explained Fromm. "Then, if we have implantables, their casing is a special bio-safe epoxy or adhesive or some material that can be safely inserted into the body for a period of time. In this case, the casing itself is a packaging material."
NPI for packaging is more tolerant than silicon wafers. To shorten turnaround time, it is not uncommon to produce a large number of samples domestically. The requirements for production qualification are not as strict as those for wafers. "We are turning around quickly," Medina explained. "Customers may send a wafer to our production department, and the remaining 25 wafers to overseas. Once they get 25 samples, they can tell others, 'Yes, this is a good production method. We have tested it locally.' Some customers may sell IP, so we will build multiple test tools or assembly batches of iterations, each with a few hundred units, so they can verify whether it works as expected."
Even with larger quantities, some products may still be produced locally. "We have seen some medical devices that may not be exported overseas even with large quantities, because it is not worth the effort to propose, identify, and verify new sources," Fromm pointed out.
However, completing a new packaging assessment can be inefficient and time-consuming. Different steps occur in different locations, requiring multiple transfers of equipment. "It is best to have a one-stop solution, but there are no good advanced packaging labs in the United States," said Hidenori Abe, Executive Director of Resonac's electronic business headquarters. "We have a learning pipeline. Although we are material suppliers, we need this production line to test our materials before recommending them to customers. We also operate a consortium in Japan to try different devices and material functions, and we hope to bring this model to the United States."
Many factors allow small suppliers to survive. Although large foundries and OSATs do not need to fear small specialized factories, these smaller manufacturers thrive in projects that large chip manufacturers and OSATs cannot or are unwilling to undertake. Whether due to special processing requirements, expected low yields, packaging complexity, or political sensitivity, small factories and packaging lines have found a large number of customers.We can imagine the market as an orchard. Chip manufacturers and assembly companies with high production can efficiently pick the easily accessible fruits from the trees through automation technology. However, they can never harvest all the fruits. Therefore, other companies can come in with professionals and ladders to obtain the remaining intact fruits. As long as the demand for all fruits still exists, both types of companies can do well.
This situation seems unlikely to change. In fact, given that advanced silicon wafer processing technology is developing so rapidly and equipment is becoming more and more customized, the demand for small-batch manufacturing may increase. Just like the traditional silicon wafer nodes are thriving, obscure specialized companies are likely to continue growing upward for a long time.
*Statement: This article is the original creation of the author. The content of the article is his personal opinion. Our reposting is only for sharing and discussion, and does not represent our approval or agreement. If there are any objections, please contact the backstage.
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